Patent · US Active

Delay lock loop delay adjusting method and apparatus

US7269524B1 · kind B1 · utility

17Cited by
15References
30Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 30, 2006
Grant dateSep 11, 2007
Priority date
Expiry dateJun 30, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/0818
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Systems and methods for synchronizing communication between devices include using a test circuit to measure a propagation time through a delay circuit. The propagation time is used to determine an initial delay value within a delay lock loop. This delay value is then changed until a preferred delay value, resulting in synchronization, is found. In various embodiments, used of the initial delay value increases the speed, reliability or other beneficial features of the synchronization.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.