Manufacturing method of semiconductor integrated circuit device and probe card
US7271015B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2005 |
| Grant date | Sep 18, 2007 |
| Priority date | — |
| Expiry date | Sep 13, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R1/07307
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Electrical testing is to be performed on a semiconductor integrated circuit device which the test pads formed. To facilitate such testing, the method of manufacture of the semiconductor integrated circuit device employs a probe card which has two or more contact terminals which can contact two or more electrodes. This probe card includes, in opposition to a wiring substrate of the semiconductor integrated circuit device in which a first wiring is formed, a first sheet having two or more contact terminals to contact the two or more electrodes; a second wiring electrically connected to the two or more contact terminals and the first wiring; and first dummy wirings which are near the region of formation of the two or more contact terminals, are arranged to a non-forming region of the second wiring, and do not participate in signal transfer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.