Patent · US Expired

Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods

US7271482B2 · kind B2 · utility

77Cited by
67References
65Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 30, 2004
Grant dateSep 18, 2007
Priority date
Expiry dateDec 30, 2024

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces having such interconnects are disclosed herein. One aspect of the invention is directed toward a method for manufacturing a microelectronic workpiece having a plurality of microelectronic dies. The individual dies include an integrated circuit and a terminal electrically coupled to the integrated circuit. In one embodiment, the method includes forming an opening in the workpiece in alignment with the terminal. The opening can be a through-hole extending through the workpiece or a blind hole that extends only partially through the substrate. The method continues by constructing an electrically conductive interconnect in the workpiece by depositing a solder material into at least a portion of the opening and in electrical contact with the terminal. In embodiments that include forming a blind hole, the workpiece can be thinned either before or after forming the hole.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.