Kyle K. Kirby
210Patents
25h-index
48Co-inventors
90Inventor score
Filing activity: Jun 1, 1998 → Dec 29, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6841883B1 | Multi-dice chip scale semiconductor components and wafer level methods of fabrication | Electricity | 455 | Expired |
| US7498675B2 | Semiconductor component having plate, stacked dice and conductive vias | Electricity | 273 | Active |
| US8030780B2 | Semiconductor substrates with unitary vias and via terminals, and associated systems and methods | Electricity | 239 | Active |
| US7300857B2 | Through-wafer interconnects for photoimager and memory wafers | Electricity | 135 | Expired |
| US7109068B2 | Through-substrate interconnect fabrication methods | Electricity | 111 | Expired |
| US7091124B2 | Methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices | Electricity | 89 | Expired |
| US7271482B2 | Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods | Electricity | 77 | Expired |
| US7232754B2 | Microelectronic devices and methods for forming interconnects in microelectronic devices | Electricity | 70 | Expired |
| US6924655B2 | Probe card for use with microelectronic components, and methods for making same | Emerging Cross-Sectional Technologies | 58 | Expired |
| US7411304B2 | Semiconductor interconnect having conductive spring contacts | Electricity | 58 | Expired |
| US7060526B2 | Wafer level methods for fabricating multi-dice chip scale semiconductor components | Electricity | 57 | Expired |
| US7645635B2 | Frame structure and semiconductor attach process for use therewith for fabrication of image sensor packages and the like, and resulting packages | Electricity | 55 | Expired |
| US7262134B2 | Microfeature workpieces and methods for forming interconnects in microfeature workpieces | Electricity | 54 | Expired |
| US7459393B2 | Method for fabricating semiconductor components with thinned substrate, circuit side contacts, conductive vias and backside contacts | Electricity | 52 | Active |
| US7452743B2 | Microelectronic imaging units and methods of manufacturing microelectronic imaging units at the wafer level | Electricity | 44 | Active |
| US7129567B2 | Substrate, semiconductor die, multichip module, and system including a via structure comprising a plurality of conductive elements | Electricity | 44 | Expired |
| US6250688A | Ramp-lock lifting device | Emerging Cross-Sectional Technologies | 44 | Expired |
| US7759800B2 | Microelectronics devices, having vias, and packaged microelectronic devices having vias | Electricity | 44 | Expired |
| US7495316B2 | Methods of forming conductive vias and methods of forming multichip modules including such conductive vias | Electricity | 42 | Active |
| US6998717B2 | Multi-dice chip scale semiconductor components | Electricity | 39 | Expired |
| US7531453B2 | Microelectronic devices and methods for forming interconnects in microelectronic devices | Electricity | 39 | Active |
| US7968460B2 | Semiconductor with through-substrate interconnect | Electricity | 36 | Active |
| US7078922B2 | Semiconductor interconnect having semiconductor spring contacts | Emerging Cross-Sectional Technologies | 34 | Expired |
| US7683458B2 | Through-wafer interconnects for photoimager and memory wafers | Electricity | 33 | Active |
| US7829976B2 | Microelectronic devices and methods for forming interconnects in microelectronic devices | Electricity | 27 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.