Integrated circuit package-in-package system
US7271496B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 16, 2005 |
| Grant date | Sep 18, 2007 |
| Priority date | — |
| Expiry date | Jan 18, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package-in-package system is provided including forming a top substrate having a first integrated circuit electrically connected thereto and mounting a second integrated circuit over the first integrated circuit. The system includes forming first electrical connectors on the second integrated circuit and encapsulating the second integrated circuit in a first encapsulant with the first electrical connectors exposed. The system includes mounting the second integrated circuit over a bottom substrate with the first electrical connectors electrically connected thereto and encapsulating the top substrate and the first encapsulant in a second encapsulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.