Method, system, and circuit for performing a memory related operation
US7272060B1 · kind B1 · utility
14Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2004 |
| Grant date | Sep 18, 2007 |
| Priority date | — |
| Expiry date | Aug 11, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system, and circuit for performing a memory related operation are disclosed. An operating voltage is applied to a bitline and a neighboring bitline is precharged. The precharge voltage has a magnitude less than the operating voltage. Both voltages ramp up at like or different rates. The precharge voltage can reach its effective magnitude prior to or with the operating voltage reaching its effective value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.