Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor
US7274594B2 · kind B2 · utility
51Cited by
4References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2006 |
| Grant date | Sep 25, 2007 |
| Priority date | — |
| Expiry date | Apr 11, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory electronic device is integrated on a semiconductor with an architecture including at least one memory matrix organized in rows or word lines and columns or bit lines of memory cells. The matrix is divided into at least a first and a second memory portions having a different access speed. The first and second memory portions may share the structures of the bit lines which correspond to one another and one by one and are electrically interrupted by controlled switches placed between the first and the second portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.