MIM capacitor structure and method of manufacture
US7282757B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2003 |
| Grant date | Oct 16, 2007 |
| Priority date | — |
| Expiry date | Nov 18, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0335
Abstract
A metal-insulator-metal (MIM) capacitor structure and method of manufacturing thereof. A plurality of MIM capacitor patterns is formed in two or more insulating layers. The insulating layers may comprise a via layer and a metallization layer of a semiconductor device. A top portion of the top insulating layer is recessed in a region between at least two adjacent MIM capacitor patterns. When the top plate material of the MIM capacitors is deposited, the top plate material fills the recessed area of the top insulating layer between the adjacent MIM capacitor pattern, forming a connecting region that couples together the top plates of the adjacent MIM capacitors. A portion of the MIM capacitor bottom electrode may be formed in a first metallization layer of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.