Bit line structure and method of fabrication

US7291881B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Ronald Kakoschke · Birkenfeld, DE
• Danny Pak-Chum Shum · Poughkeepsie, US
• Georg Tempel · Zorneding, DE

Key dates

• Filing date: Nov 2, 2006
• Grant date: Nov 6, 2007
• Expiry date: Nov 2, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/037

Abstract

The invention relates to a bit line structure having a surface bit line (DLx) and a buried bit line (SLx), the buried bit line (SLx) being formed in a trench with a trench insulation layer (6) and being connected to doping regions (10) with which contact is to be made via a covering connecting layer (12) and a self-aligning terminal layer (13) in an upper partial region of the trench.