Deferring loads and stores when a load buffer or store buffer fills during execute-ahead mode
US7293161B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2005 |
| Grant date | Nov 6, 2007 |
| Priority date | — |
| Expiry date | Dec 8, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0862
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention provides a system that facilitates deferring execution of instructions with unresolved data dependencies as they are issued for execution in program order. During a normal execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system generates a checkpoint that can subsequently be used to return execution of the program to the point of the instruction. Next, the system executes the instruction and subsequent instructions in an execute-ahead mode, wherein instructions that cannot be executed because of an unresolved data dependency are deferred, and wherein other non-deferred instructions are executed in program order. Upon encountering a store during the execute-ahead mode, the system determines if the store buffer is full. If so, the system prefetches a cache line for the store, and defers execution of the store.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.