Low temperature process for TFT fabrication

US7300829B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Mark Hsiao · Tracy, US
• Dong-Kil Yim · Pleasanton, US
• Takako Takehara · Hayward, US
• Quanyuan Shang · Saratoga, US
• William Harshbarger · San Jose, US
• Woong-Kwon Kim · Cheonan-si, KR
• Duk-Chul Yun · Seoul, KR
• Youn-Gyung Chang · Seojong-myeon, KR

Key dates

• Filing date: Jun 2, 2003
• Grant date: Nov 27, 2007
• Expiry date: Dec 20, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6746

Abstract

Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.