Method of manufacturing a trench isolation region in a semiconductor device
US7303951B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2005 |
| Grant date | Dec 4, 2007 |
| Priority date | — |
| Expiry date | Apr 16, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device for preventing dielectric breakdown of gate electrodes attributable to needle-like protrusions caused inside a trench in the step of forming element isolation trench in which includes forming a silicon oxide film over a silicon nitride film as an etching mask for forming element isolation trenches, then cleaning the surface of a substrate with a hydrofluoric acid etching solution to lift off obstacles deposited over the surface of the silicon oxide film, before the step of patterning the silicon nitride film by using as a mask a photoresist film provided with an anti-reflection film therebelow.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.