Self test for the phase angle of the data read clock signal DQS

US7307895B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Justus Kuhn · Birkenfeld, DE
• Wolfgang Anton Spirkl · Germering, DE

Key dates

• Filing date: Sep 15, 2005
• Grant date: Dec 11, 2007
• Expiry date: Oct 25, 2025

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C29/50012
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

The invention relates to a semiconductor memory apparatus having at least one clock input contact for inputting an external clock signal, at least one clock output contact for outputting a data read clock signal for reading data stored in the semiconductor memory apparatus, at least one data contact for outputting data stored in the semiconductor memory apparatus, at least one phase adjustment device which is designed for approximately adjusting a phase of the data read clock signal on the basis of a phase of the external clock signal at least one phase difference test device which is designed for approximately detecting a phase difference between the phase of the data read clock signal and the phase of the external clock signal and for outputting a test result on the basis of the detected phase difference.