Patent · US Expired

Integrated circuit comprising a test mode secured by initialization of the test mode

US7308635B2 · kind B2 · utility

1Cited by
4References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 28, 2005
Grant dateDec 11, 2007
Priority date—
Expiry dateDec 4, 2025

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/318533
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

An electronic circuit, having a test mode in application of the “internal scan path” technique, includes a plurality of configurable cells and a control circuit. The electronic circuit is adapted to working in a standard mode of operation or in a test mode during which the control circuit is active and configures the configurable cells either in a functional state or in a chained state. The electronic circuit furthermore includes a validation circuit that performs the following operations successively when it receives an instruction for changing the mode of operation (TEST, FIN) of the electronic circuit: produce initialization signals (INIT1, INIT2, . . . , INITN) to command the initialization of all the configurable cells, and then produce a mode-changing signal (VAL).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.