David Hely
17Patents
2h-index
6Co-inventors
43Inventor score
Filing activity: Jan 24, 2005 → Sep 11, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8495734B2 | Method and device for detecting an erroneous jump during program execution | Physics | 5 | Active |
| US7577886B2 | Method for testing an electronic circuit comprising a test mode secured by the use of a signature, and associated electronic circuit | Physics | 3 | Active |
| US7747935B2 | Method and device for securing the reading of a memory | Physics | 2 | Active |
| US10289577B2 | System, method and computer-accessible medium for low-overhead security wrapper for memory access control of embedded systems | Physics | 2 | Active |
| US7768318B2 | Detection of a disturbance in the state of an electronic circuit flip-flop | Physics | 2 | Active |
| US7512852B2 | Protecting an integrated circuit test mode | Physics | 2 | Expired |
| US7694197B2 | Integrated circuit comprising a test mode secured by detection of the state of a control signal | Physics | 2 | Active |
| US7921342B2 | Integrated circuit comprising a test mode secured by the use of an identifier, and associated method | Physics | 1 | Active |
| US7725786B2 | Protecting an integrated circuit test mode | Physics | 1 | Active |
| US11531785B2 | PUF-based data integrity | Physics | 1 | Active |
| US7478293B2 | Method of securing the test mode of an integrated circuit via intrusion detection | Physics | 1 | Expired |
| US7484152B2 | Securing the test mode of an integrated circuit | Physics | 1 | Active |
| US7568140B2 | Integrated circuit having configurable cells and a secured test mode | Physics | 1 | Active |
| US7308635B2 | Integrated circuit comprising a test mode secured by initialization of the test mode | Physics | 1 | Expired |
| US7676717B2 | Electronic circuit comprising a test mode secured by the breaking of a test chain, and associated electronic circuit | Physics | 0 | Active |
| US11343109B2 | Secure enrollment for physical unclonable function devices | Electricity | 0 | Active |
| US7930605B2 | Electronic circuit comprising a test mode secured by insertion of decoy data in the test chain, associated method | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.