Method and apparatus for testing embedded cores

US7313739B2 · kind B2 · utility

Assignee

• Analog Devices, Inc. · US

Inventors

• Sankaran M. Menon · Austin, US
• Luis A. Basto · Austin, US
• Tien Dinh · Cedar Park, US
• Thomas Tomazin · Austin, US
• Juan Guillermo Revilla · Cary, US

Key dates

• Filing date: Dec 31, 2002
• Grant date: Dec 25, 2007
• Expiry date: May 11, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C2029/3202
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Testing memory devices. An apparatus may include a test module operative to perform a test on a plurality of pipelined memory elements and a fail trace module operative to interrupt the test in response to identifying a failure of a memory element and to store an address of said memory element in a storage unit.