Method for fabricating transistor of semiconductor device
US7314792B2 · kind B2 · utility
8Cited by
1References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2005 |
| Grant date | Jan 1, 2008 |
| Priority date | — |
| Expiry date | Jul 30, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/027
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a transistor of a semiconductor device is provided. The method includes: forming device isolation layers in a substrate including a bottom structure, thereby defining an active region; etching the active region to a predetermined depth to form a plurality of recess structures each of which has a flat bottom portion with a critical dimension (CD) larger than that of a top portion; and sequentially forming a gate oxide layer and a metal layer on the recess structures; and patterning the gate oxide layer and the metal layer to form a plurality of gate structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.