Method and system for performing heuristic constraint simplification
US7315996B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2005 |
| Grant date | Jan 1, 2008 |
| Priority date | — |
| Expiry date | Apr 24, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for performing verification is disclosed. The method includes selecting a first computer-design constraint for simplification and applying structural reparameterization to simplify the first computer-design constraint. In response to determining that the first computer-design constraint is not eliminated, the first computer-design constraint is set equal to a dead-end state of the constraint. A structural preimage of the first computer-design constraint is created, in response to determining that a combination of a target and the dead-end state of the first computer-design constraint is equal to a combination of the target and the structural preimage of the first computer-design constraint, the first computer-design constraint is set equal to the structural preimage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.