Nonvolatile semiconductor memory apparatus
US7317630B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2005 |
| Grant date | Jan 8, 2008 |
| Priority date | — |
| Expiry date | Nov 17, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/49175
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory apparatus includes a separate controller circuit and memory circuit. The controller circuit is fabricated on a first integrated circuit chip. The controller circuit includes a plurality of charge pump circuits, a system interface logic circuit, a memory control logic circuit, and one or more analog circuits. The memory circuit is fabricated on a second integrated circuit chip and includes a column decoder, a row decoder, a control register, and a data register. A memory-controller interface area includes a first plurality of die bond pads on the first integrated circuit chip and a second plurality of die bond pads on the second integrated circuit chip such that the first and second integrated circuit chips may be die-bonded together. A single controller circuit may interface with a plurality of memory circuits, thus further reducing overall costs as each memory circuit does not require a dedicated controller circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.