Fabrication method of a non-volatile memory
US7319058B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 15, 2005 |
| Grant date | Jan 15, 2008 |
| Priority date | — |
| Expiry date | Oct 12, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
Abstract
A fabrication method for a non-volatile memory is provided. To fabricate the non-volatile memory, a plurality of first trenches and second trenches are formed in a substrate, wherein the second trenches are disposed above the first trenches and cross over the first trenches. Then, a tunneling layer and a charge storage layer are sequentially formed on both sidewalls of each second trench. An isolation layer is filled into the first trench. Furthermore, a charge barrier layer is formed on the sidewall of the second trench, and a gate dielectric layer is formed at the bottom of the second trench. A control gate layer is filled into the second trench. Finally, two first doping regions are formed in the substrate at both sides of the control gate layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.