High density FET with self-aligned source atop the trench
US7319059B2 · kind B2 · utility
0Cited by
2References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 31, 2005 |
| Grant date | Jan 15, 2008 |
| Priority date | — |
| Expiry date | Jan 26, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/154
Abstract
A method for manufacturing a power semiconductor device which includes forming a semiconductor region such as a polysilicon layer or epitaxially grown silicon over a region implanted with source implants and applying heat in a thermal step to cause the source implants to diffuse into the semiconductor region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.