Methods for selective integration of airgaps and devices made by such methods
US7319274B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2006 |
| Grant date | Jan 15, 2008 |
| Priority date | — |
| Expiry date | Mar 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for the production of airgaps in semiconductor devices and devices produced using such methods are disclosed. An example semiconductor device includes a damascene stack formed using such methods. The damascene stack includes a patterned dielectric layer including an interconnect structure, where the dielectric layer is formed of a dielectric material including Si, C and O. The damascene stack also includes a converted portion of the dielectric layer, where the converted portion is adjacent to the at least one interconnect structure and has a lower carbon content than the dielectric material. The damascene stack also includes an airgap formed adjacent to the interconnect structure, the airgap being formed by removing at least part of the converted portion using an etch compound.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.