Bootable programmable logic device for internal decoding of encoded configuration data
US7328335B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2004 |
| Grant date | Feb 5, 2008 |
| Priority date | — |
| Expiry date | Mar 12, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17768
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for decoding configuration data is described. A programmable logic device having a configuration interface is coupled to boot memory coupled at the configuration interface. The boot memory contains boot cores for configuring the programmable logic device via the configuration interface. The boot cores include a configuration decoder core and an internal processor interface core. The boot cores may further include a processor core. The configuration decoder core provides a peripheral interface internal to the programmable logic device, and the boot memory contains at least one set of instructions for decoding encoded data and at least one library for writing decoded encoded data to configuration memory of the programmable logic device. The encoded data is obtained from data memory via the peripheral interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.