Methods of fabricating fin field transistors
US7332386B2 · kind B2 · utility
37Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2005 |
| Grant date | Feb 19, 2008 |
| Priority date | — |
| Expiry date | Jan 5, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fin field effect transistor (FinFET) includes a substrate, a fin, a gate electrode, a gate insulation layer, and source and drain regions in the fin. The fin is on and extends laterally along and vertically away from the substrate. The gate electrode covers sides and a top of a portion of the fin. The gate insulation layer is between the gate electrode and the fin. The source region and the drain region in the fin and adjacent to opposite sides of the gate electrode. The source region of the fin has a different width than the drain region of the fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.