Memory module with a clock signal regeneration circuit and a register circuit for temporarily storing the incoming command and address signals

US7334150B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Hermann Ruckerbauer · Radolfzell, DE
• Abdallah Bacha · Munich, DE
• Christian Sichert · Attenkirchen, DE
• Dominique Savignac · Ismaning, DE
• Peter Gregorius · Munich, DE
• Paul Wallner · Prien am Chiemsee, DE

Key dates

• Filing date: Dec 3, 2004
• Grant date: Feb 19, 2008
• Expiry date: Feb 15, 2026

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C5/063
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A semiconductor memory module includes a plurality of semiconductor memory chips and bus signal lines that supply an incoming clock signal and incoming command and address signals to the semiconductor memory chips. A clock signal regeneration circuit and a register circuit are arranged on the semiconductor memory module in a common chip packing connected to the bus signal lines. The clock signal regeneration circuit and the register circuit respectively condition the incoming clock signal and temporarily store the incoming command and address signals, respectively multiply the conditioned clock signal and the temporarily stored command and address signals by a factor of 1:X, and respectively supply to the semiconductor memory chips the conditioned clock signal and the temporarily stored command and address signals.