Method for manufacturing a memory device having a nanocrystal charge storage region
US7335594B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 27, 2005 |
| Grant date | Feb 26, 2008 |
| Priority date | — |
| Expiry date | Apr 25, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method for manufacturing a memory device having a metal nanocrystal charge storage structure. A substrate is provided and a first layer of dielectric material is grown on the substrate. An absorption layer is formed on the first layer of dielectric material. The absorption layer includes a plurality of titanium atoms bonded to the first layer of dielectric material, a nitrogen atom bonded to each titanium atom, and at least one ligand bonded to the nitrogen atom. The at least one ligand is removed from the nitrogen atoms to form nucleation centers. A metal such as tungsten is bonded to the nucleation centers to form metallic islands. A dielectric material is formed on the nucleation centers and annealed to form a nanocrystal layer. A control oxide is formed over the nanocrystal layer and a gate electrode is formed on the control oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.