Method of forming a field effect transistor having a stressed channel region

US7341903B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Joerg Hohage · Dresden, DE
• Hartmut Ruelke · Dresden, DE
• Kai Frohberg · Meißen, DE

Key dates

• Filing date: Jul 8, 2005
• Grant date: Mar 11, 2008
• Expiry date: Jul 8, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0212

Abstract

A semiconductor structure comprises a transistor element formed in a substrate. A stressed layer is formed over the transistor element. The stressed layer has a predetermined compressive intrinsic stress having an absolute value of about 1 GPa or more. Due to this high intrinsic stress, the stressed layer exerts considerable elastic forces to the channel region of the transistor element. Thus, compressive stress is created in the channel region. The compressive stress leads to an increase of the mobility of holes in the channel region.