Integrated process for thin film resistors with silicides
US7341958B2 · kind B2 · utility
3Cited by
5References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2005 |
| Grant date | Mar 11, 2008 |
| Priority date | — |
| Expiry date | Jul 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/209
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The formation of devices in semiconductor material. In one embodiment, a method of forming a semiconductor device is provided. The method comprises forming at least one hard mask overlaying at least one layer of resistive material. Forming at least one opening to a working surface of a silicon substrate of the semiconductor device. Cleaning the semiconductor device with a diluted HF/HCL process. After cleaning with the diluted HF/HCL process, forming a silicide contact junction in the at least one of the opening to the working surface of the silicon substrate and then forming interconnect metal layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.