NROM semiconductor memory device and fabrication method

US7344923B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Franz Hofmann · Munich, DE
• Erhard Landgraf · Dresden, DE
• Michael Specht · Munich, DE

Key dates

• Filing date: Nov 18, 2005
• Grant date: Mar 18, 2008
• Expiry date: Nov 18, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/691

Abstract

An NROM semiconductor memory device and fabrication method are disclosed. According to one aspect, a method for fabricating an NROM semiconductor memory device can include providing a plurality of u-shaped MOSFETs, which are spaced apart from one another and have a multilayer dielectric. The dielectric suitable for charge trapping along rows in a first direction and alone columns in a second direction in trenches of a semiconductor substrate. Source/drain regions are provided between the u-shaped MOSFETs in interspaces between the rows which run parallel to the columns. Isolation trenches are provided in the source/drain regions between the u-shaped MOSFETs of adjacent columns as far as a particular depth in the semiconductor substrate. The isolation trenches are filled with an insulation material. Word lines are provided for connecting respective rows of u-shaped MOSFETs.