Process for vertically patterning substrates in semiconductor process technology by means of inconformal deposition

US7344953B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Thomas Hecht · Dresden, DE
• Matthias Goldbach · Dresden, DE
• Uwe Schroder · Dresden, DE

Key dates

• Filing date: Jan 26, 2005
• Grant date: Mar 18, 2008
• Expiry date: Dec 4, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02304
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

On a substrate surface, which has been patterned in the form of a relief, of a substrate, typically of a semiconductor wafer, a deposition process is used to provide a covering layer on process surfaces which are vertical or inclined with respect to the substrate surface. The covering layer is patterned in a direction which is vertical with respect to the substrate surface by limiting a process quantity of at least one precursor material and/or by temporarily limiting the deposition process, and is formed as a functional layer or mask for subsequent process steps.