Method and apparatus for high voltage operation for a high performance semiconductor memory device
US7345916B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2006 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Jun 12, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2245
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus are provided for high performance, high voltage memory operations on selected memory cells (200) of a semiconductor memory device (100). A high voltage generator (106) during program or erase operations provides a continuous high voltage level (702) on selected word lines (502) and maintains a continuous high voltage level supply to a bit line decoder (120) which sequentially provides the high voltage level (706) to a first portion of bit lines (504) and discharges (708) those bit lines (504) before providing the high voltage level to a second portion (710).For additional improvements to program operations, the high voltage generator (106) decouples high voltages provided to the word lines (502) and the bit lines (504) by providing a current flow control device (1208) therebetween and provides a boosting voltage at a time (1104) to overcome a voltage level drop (1102) resulting from a capacitor load associated with selected bit lines (504) and/or the bit line decoder (120) precharges (1716) a second portion of the bit lines (504) while providing a high voltage level to a first portion to program (1706) a first portion of memory cells (200).For improvements to…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.