Maintaining internal voltages of an integrated circuit in response to a clocked standby mode
US7345931B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2005 |
| Grant date | Mar 18, 2008 |
| Priority date | — |
| Expiry date | Aug 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit for controlling an output reference voltage generated by a reference voltage generator disposed on a memory device are provided. A signal for enabling a clocked standby mode of the memory device is received. If the signal indicates that the memory device is in the clocked standby mode, a first reference voltage is generated as the output reference voltage of the reference voltage generator using a first voltage. If the signal indicates that the memory device is not in the clocked standby mode, a second reference voltage is generated as the output reference voltage of the reference voltage generator using a second voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.