Structure and method of making double-gated self-aligned finFET having gates of different lengths

US7348641B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Huilong Zhu · Poughkeepsie, US
• Bruce B. Doris · Brewster, US
• Xinlin Wang · Irvine, US
• Jochen Beintner · Wappingers Falls, US
• Ying Zhang · Santa Clara, US
• Philip J. Oldiges · Lagrangeville, US

Key dates

• Filing date: Aug 31, 2004
• Grant date: Mar 25, 2008
• Expiry date: Jun 3, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6217

Abstract

A gated semiconductor device is provided, in which the body has a first dimension extending in a lateral direction parallel to a major surface of a substrate, and second dimension extending in a direction at least substantially vertical and at least substantially perpendicular to the major surface, the body having a first side and a second side opposite the first side. The gated semiconductor device includes a first gate overlying the first side, and having a first gate length in the lateral direction. The gated semiconductor device further includes a second gate overlying the second side, the second gate having a second gate length in the lateral direction which is different from, and preferably shorter than the first gate length. In one embodiment, the first gate and the second gate being electrically isolated from each other. In another embodiment the first gate consists essentially of polycrystalline silicon germanium and the second gate consists essentially of polysilicon.