Configurable logic component without a local configuration memory and with a parallel configuration bus

US7348795B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Michael Scheppler · Gröbenzell, DE
• Wolfgang Gruber · Bischofswerda, DE

Key dates

• Filing date: Jan 10, 2005
• Grant date: Mar 25, 2008
• Expiry date: Mar 24, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K19/17796
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A configurable logic component (30) does not have a local configuration memory. The configuration of the configurable logic component is defined by applied voltages. The configuration voltages are advantageously generated in an external configuration memory (2). In one preferred refinement, a memory chip (20) (for example EEPROM) and the inventive logic component without a configuration memory (30) are mounted face-to-face. An intermediate, structured solder layer (40) makes available a plurality of electrical connections.