Semiconductor device
US7349250B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2005 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Sep 27, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The degree of integration and the number of rewriting of a semiconductor device having a nonvolatile memory element are improved. A first MONOS nonvolatile-memory-element and a second MONOS nonvolatile-memory-element having a large gate width compared with the first MONOS nonvolatile-memory-element are mounted together on the same substrate, and the first MONOS nonvolatile-memory-element is used for storing program data which is scarcely rewritten, and the second MONOS nonvolatile-memory-element is used for storing processed data which is frequently rewritten.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.