Programmable DQS preamble
US7349269B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 31, 2005 |
| Grant date | Mar 25, 2008 |
| Priority date | — |
| Expiry date | Sep 26, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for programming a data strobe (DQS) preamble in a memory by loading a defined set of bits into one or more registers of the memory, where one or more bits are formatted specifically for enabling the data strobe preamble. At least one of the bits is used to enable a data strobe preamble as either a default data strobe preamble of the memory or as a reduced data strobe preamble with a time length set equal to a fraction of the default preamble or a fraction of a clock cycle. The enabling bit can be used to provide a input for generating a delay that provides a delayed signal to drivers of the memory for producing a reduced data strobe preamble and for sequencing or driving data to be read out of the memory. The reduced data strobe preamble can also be used for writing data into the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.