Patent · US Expired

Semiconductor module having an internal semiconductor chip stack, and method for producing said semiconductor module

US7352057B2 · kind B2 · utility

11Cited by

2References

9Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Jurgen Grafe · Dresden, DE
Sylke Ludewig · Dresden, DE
Jochen Thomas · Munich, DE
Peter Weitz · Sauerlach, DE

Key dates

Filing date	Oct 7, 2005
Grant date	Apr 1, 2008
Priority date	—
Expiry date	Mar 8, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/30111
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor module having an internal semiconductor chip stack on a wiring substrate is disclosed. In one embodiment, the semiconductor chip stack has semiconductor chips which are arranged such that they are offset, the semiconductor chips having bonding connection pads in at least one edge region of their active top side. These bonding connection pads are electrically connected to the wiring substrate via bonding connections. In this case, the semiconductor chips are stacked on top of one another in an offset manner such that the bonding connection pads remain free of a semiconductor chip which is stacked on top of them. In this case, the semiconductor chips may be identical silicon chips which may differ, for example in pairs, in terms of their wiring structure for the centrally arranged contact areas in different edge regions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.