Patchable and/or programmable decode using predecode selection
US7353363B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2006 |
| Grant date | Apr 1, 2008 |
| Priority date | — |
| Expiry date | Mar 28, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3897
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Mechanisms have been developed for providing great flexibility in processor instruction handling, sequencing and execution. In particular, it has been discovered that a configurable predecode mechanism can be employed to select, for respective instruction patterns, between fixed decode and programmable decode paths provided by a processor. In this way, a patchable and/or programmable decode mechanism can be efficiently provided. In some realizations, either (or both) predecode or (and) decode may be configured or reconfigured post-manufacture. In some realizations, either (or both) predecode or (and) decode may be configured at (or about) initialization. In some realizations, either (or both) predecode or (and) decode may be configured at run-time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.