Methods of forming solder bumps on exposed metal pads
US7358174B2 · kind B2 · utility
14Cited by
137References
31Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 12, 2005 |
| Grant date | Apr 15, 2008 |
| Priority date | — |
| Expiry date | Jun 23, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an electronic structure may include providing a substrate having a metal pad thereon. A conductive barrier layer may be formed on a first portion of the metal pad, and a second exposed portion of the metal pad may be free of the conductive barrier layer. In addition, an interconnection structure may be provided on the conductive barrier layer with the conductive barrier layer being between the interconnection structure and the metal pad. Moreover, the interconnection structure and the conductive barrier layer may include different materials. Related structures are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.