Coating process for patterned substrate surfaces

US7358187B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Thomas Hecht · Dresden, DE
• Stefan Jakschik · Kessel-Lo, BE
• Uwe Schroder · Dresden, DE

Key dates

• Filing date: Jun 8, 2005
• Grant date: Apr 15, 2008
• Expiry date: Mar 14, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/0228
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The present invention provides a coating process for patterned substrate surfaces, in which a substrate (101) is provided, the substrate having a surface (105) which is patterned in a substrate patterning region (102) and has one or more trenches (106) that are to be filled to a predetermined filling height (205), a catalyst layer (201) is introduced into the trenches (106) that are to be filled, a reaction layer (202) is deposited catalytically in the trenches (106) that are to be filled, the catalytically deposited reaction layer (202) is densified in the trenches (106) that are to be filled, and the introduction of the catalyst layer (201) and the catalytic deposition of the reaction layer (202) are repeated until the trenches (106) that are to be filled have been filled to the predetermined filling height (205).