Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow
US7368045B2 · kind B2 · utility
10Cited by
15References
39Claims
0Family size
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Key dates
| Filing date | Jan 27, 2005 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | May 24, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method is provided for electroplating a gate metal or other conducting or semiconducting material directly on a dielectric such as a gate dielectric. The method involves selecting a substrate, dielectric layer, and electrolyte solution or melt, wherein the combination of the substrate, dielectric layer, and electrolyte solution or melt allow an electrochemical current to be passed from the substrate through the dielectric layer into the electrolyte solution or melt. Methods are also provided for electrochemical modification of dielectrics utilizing through-dielectric current flow.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.