Combo memory design and technology for multiple-function java card, sim-card, bio-passport and bio-id card applications
US7369438B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 16, 2005 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | Apr 1, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/114
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A combination volatile and nonvolatile memory integrated circuit has at least one volatile memory array placed on the substrate and multiple nonvolatile memory arrays. The volatile and nonvolatile memory arrays have address space associated with each other such that each array may be addressed with common addressing signals. The combination volatile and nonvolatile memory integrated circuit further has a memory control circuit in communication with external circuitry to receive address, command, and data signals. The memory control circuit interprets the address, command, and data signals, and for transfer to the volatile memory array and the nonvolatile memory arrays for reading, writing, programming, and erasing the volatile and nonvolatile memory arrays. The volatile memory array is may be a SRAM, a pseudo SRAM, or a DRAM. Any of the nonvolatile memory arrays maybe masked programmed ROM arrays, NAND configured flash memory NAND configured EEPROM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.