Low leakage MIM capacitor
US7378719B2 · kind B2 · utility
14Cited by
87References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 20, 2000 |
| Grant date | May 27, 2008 |
| Priority date | — |
| Expiry date | Mar 20, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/957
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between the bottom electrode and the top electrode. The capacitor structures further include a metal oxide buffer layer interposed between the dielectric layer and at least one of the bottom and top electrodes. Each metal oxide buffer layer acts to improve capacitance and reduce capacitor leakage. The capacitors are suited for use as memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.