Patent · US Active

Method for accessing a multilevel nonvolatile memory device of the flash NAND type

US7382660B2 · kind B2 · utility

12Cited by
6References
19Claims
0Family size

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Key dates

Filing dateJul 20, 2006
Grant dateJun 3, 2008
Priority date
Expiry dateJul 27, 2026

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2211/5641
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Multi-level programming allows for writing a first and a second bit in selected cells by separately programming the first bit from the second bit. Programming of the first bit determines a shifting from a first threshold level to a second threshold level. Programming of the second bit requires a preliminary reading to detect whether the first bit has been modified, performing a first writing step to bring the cell to a third threshold voltage if the first bit has been modified and performing a second writing step to bring the selected cell to a fourth threshold voltage different from the third threshold level if the first bit has not been modified. For increasing reading and program reliability, during preliminary reading of the second portion a reading result is forced to correspond to the first threshold level.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.