Channel bonding control logic architecture
US7382823B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 22, 2002 |
| Grant date | Jun 3, 2008 |
| Priority date | — |
| Expiry date | Apr 17, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L5/14
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A design is used for coordinating channel bonding operations of a set of transceivers. The set include a master transceiver and a plurality of first level slave transceivers that perform channel bonding operations. Each first level transceiver is controlled by the master transceiver. The set also comprises a plurality of second level slave transceivers that perform channel bonding operations. Each second level transceiver is controlled by one of the plurality of first level transceivers. Any transceiver can be set as either a master, a first level slave or a second level slave. The design comprises a plurality of flip-flops and multiplexers, and is controlled by a MODE signal that determines the mode of operation of the design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.