Fabrication method for printed circuit board
US7384566B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2005 |
| Grant date | Jun 10, 2008 |
| Priority date | — |
| Expiry date | Dec 9, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49162
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A fabrication method for PCBs. The method includes providing a substrate having a layout area and a periphery area around the layout area on a surface, forming a patterned wiring layer, having a bus line in the periphery area, a plurality of pads in the layout area, a plurality of bridge lines providing electrical connection between the pads, and a plating line electrically connecting the bus line and pads, overlying the substrate, forming a patterned solder mask over the substrate and wiring layer, the patterned solder mask having a plurality of first openings respectively exposing the pads and plating a metal layer respectively overlying the pads, forming a plurality of second openings respectively exposing the bridge lines between the pads, and removing the exposed bridge lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.