Fabrication process for a semiconductor integrated circuit device
US7387957B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2005 |
| Grant date | Jun 17, 2008 |
| Priority date | — |
| Expiry date | Mar 17, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a fabrication process of a semiconductor integrated circuit device, upon effecting connection of an interconnection made of aluminum or aluminum alloy and another interconnection made of Cu or Cu alloy, a barrier conductor film or plug is disposed at the joint portion between these interconnections. Among the interconnection layers formed, the uppermost one is made of a wiring material such as aluminum or aluminum alloy, while the lower one is made of Cu or Cu alloy. The lowest interconnection is made of a conductive material other than Cu or Cu alloy. For example, the conductive material which permits minute processing and has both low resistance and high EM resistance such as tungsten is employed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.