Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
US7390709B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2004 |
| Grant date | Jun 24, 2008 |
| Priority date | — |
| Expiry date | Oct 1, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0177
Abstract
A method for making a semiconductor device is described. That method comprises forming a first dielectric layer on a substrate, a trench within the first dielectric layer, and a second dielectric layer on the substrate. The second dielectric layer has a first part that is formed in the trench and a second part. After a first metal layer with a first workfunction is formed on the first and second parts of the second dielectric layer, part of the first metal layer is converted into a second metal layer with a second workfunction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.