Uday Shah
134Patents
27h-index
66Co-inventors
93Inventor score
Filing activity: May 12, 2000 → May 17, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7326656B2 | Method of forming a metal oxide dielectric | Emerging Cross-Sectional Technologies | 424 | Expired |
| US7531437B2 | Method of forming metal gate electrodes using sacrificial gate electrode material and sacrificial gate dielectric material | Emerging Cross-Sectional Technologies | 172 | Expired |
| US7825437B2 | Unity beta ratio tri-gate transistor static random access memory (SRAM) | Electricity | 162 | Active |
| US7745270B2 | Tri-gate patterning using dual layer gate stack | Electricity | 115 | Active |
| US7898041B2 | Block contact architectures for nanoscale channel transistors | Electricity | 101 | Active |
| US7208361B2 | Replacement gate process for making a semiconductor device that includes a metal gate electrode | Electricity | 94 | Expired |
| US7157378B2 | Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Electricity | 85 | Expired |
| US7479421B2 | Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby | Electricity | 84 | Expired |
| US7407847B2 | Stacked multi-gate transistor design and method of fabrication | Electricity | 80 | Active |
| US7071064B2 | U-gate transistors and methods of fabrication | Electricity | 76 | Expired |
| US7153784B2 | Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Electricity | 67 | Expired |
| US7390709B2 | Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Electricity | 62 | Expired |
| US7279375B2 | Block contact architectures for nanoscale channel transistors | Electricity | 55 | Expired |
| US7153734B2 | CMOS device with metal and silicide gate electrodes and a method for making it | Emerging Cross-Sectional Technologies | 53 | Expired |
| US7220635B2 | Method for making a semiconductor device with a metal gate electrode that is formed on an annealed high-k gate dielectric layer | Electricity | 53 | Expired |
| US7361958B2 | Nonplanar transistors with metal gate electrodes | Emerging Cross-Sectional Technologies | 50 | Expired |
| US7176090B2 | Method for making a semiconductor device that includes a metal gate electrode | Emerging Cross-Sectional Technologies | 46 | Expired |
| US7355281B2 | Method for making semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Electricity | 44 | Expired |
| US7183184B2 | Method for making a semiconductor device that includes a metal gate electrode | Electricity | 41 | Expired |
| US7138323B2 | Planarizing a semiconductor structure to form replacement metal gates | Electricity | 40 | Expired |
| US8283653B2 | Non-planar germanium quantum well devices | Electricity | 36 | Active |
| US7550333B2 | Nonplanar device with thinned lower body portion and method of fabrication | Emerging Cross-Sectional Technologies | 35 | Active |
| US7160767B2 | Method for making a semiconductor device that includes a metal gate electrode | Electricity | 34 | Expired |
| US7547637B2 | Methods for patterning a semiconductor film | Electricity | 34 | Expired |
| US7528025B2 | Nonplanar transistors with metal gate electrodes | Emerging Cross-Sectional Technologies | 34 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.