Inventor · Beaverton, OR, US

Suman Datta

191Patents
41h-index
101Co-inventors
89Inventor score

Filing activity: Aug 23, 2002 → Jan 13, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US6858478B2 Tri-gate devices and methods of fabrication Emerging Cross-Sectional Technologies 426 Expired
US6909151B2 Nonplanar device with stress incorporation layer and method of fabrication Electricity 187 Expired
US7456476B2 Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication Electricity 173 Expired
US7825437B2 Unity beta ratio tri-gate transistor static random access memory (SRAM) Electricity 162 Active
US7268058B2 Tri-gate transistors and methods to fabricate same Electricity 144 Expired
US7170120B2 Carbon nanotube energy well (CNEW) field effect transistor Emerging Cross-Sectional Technologies 136 Expired
US7126199B2 Multilayer metal gate electrode Electricity 132 Expired
US7531393B2 Non-planar MOS structure with a strained channel region Electricity 119 Active
US7358121B2 Tri-gate devices and methods of fabrication Emerging Cross-Sectional Technologies 117 Expired
US7569857B2 Dual crystal orientation circuit devices on the same substrate Electricity 113 Active
US7898041B2 Block contact architectures for nanoscale channel transistors Electricity 101 Active
US7348284B2 Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow Emerging Cross-Sectional Technologies 98 Expired
US7241653B2 Nonplanar device with stress incorporation layer and method of fabrication Electricity 97 Expired
US7148548B2 Semiconductor device with a high-k gate dielectric and a metal gate electrode Electricity 96 Expired
US7005366B2 Tri-gate devices and methods of fabrication Emerging Cross-Sectional Technologies 86 Expired
US7157378B2 Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode Electricity 85 Expired
US7479421B2 Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby Electricity 84 Expired
US6974738B2 Nonplanar device with stress incorporation layer and method of fabrication Electricity 82 Expired
US7407847B2 Stacked multi-gate transistor design and method of fabrication Electricity 80 Active
US7820513B2 Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication Electricity 69 Active
US7153784B2 Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode Electricity 67 Expired
US7494862B2 Methods for uniform doping of non-planar transistor structures Electricity 65 Active
US7390709B2 Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode Electricity 62 Expired
US7381608B2 Method for making a semiconductor device with a high-k gate dielectric and a metal gate electrode Electricity 61 Expired
US6970373B2 Method and apparatus for improving stability of a 6T CMOS SRAM cell Electricity 59 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.